Energy-efficient memory system design
Title: Energy-efficient memory system design
DNr: SNIC 2015/1-58
Project Type: SNIC Medium Compute
Principal Investigator: David Black-Schaffer <david.black-schaffer@it.uu.se>
Affiliation: Uppsala universitet
Duration: 2015-02-27 – 2016-03-01
Classification: 10206 10202
Homepage: http://www.it.uu.se/research/group/uart/hardware_optimization#energy_efficient_caches
Keywords:

Abstract

Computer systems today spend nearly half of their energy on data movement, both within the processor and between the CPU and main memory. This research project aims to tackle this problem by investigating techniques to make the memory system more intelligent and thereby more power-aware. Our initial work in this area has developed novel techniques for power-efficient cache, data movement, and data placement. Moving forward we will extend this work to more full-system integration, including micro architectural integration of the pipeline and memory system and system-level integration of the OS/application and the memory system.